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A critical vulnerability in MegaRAC BMC allows unauthorized attackers to execute code on servers. MegaRAC BMC is one of the world’s most popular server management solutions.

On-premises datacenter operators and cloud providers use MegaRAC BMC to remotely manage servers. The technology is incorporated into systems from manufacturers such as Dell EMC, HPE, Lenovo and AMD.

In August 2022, security firm Eclypsium discovered three vulnerabilities in the firmware of MegaRAC BMC. The vulnerabilities were recently disclosed.

Critical vulnerability

The most severe issue (CVE-2022-40259) received a CVSS score of 9.9. The vulnerability allows attackers to execute code by sending a Redfish API call to systems running MegaRAC BMC firmware.

Redfish is an API standard for server management. Most infrastructure vendors support the standard. The firmware of MegaRAC BMC contains an implementation of Redfish. A flaw in the implementation allows attackers to send and execute code on a system through a Redfish API call.

Redfish API calls aren’t accepted by every sender. An attacker needs an account with low-level privileges to exploit the vulnerability.

Vulnerabilities with such a condition rarely receive CVSS scores of 9.9, but this is an exceptional case. MegaRAC BMC is an industry standard for server management. The firmware is incorporated into a huge number of hardware systems.

No simple patch

MegaRAC BMC is developed by American Megatrends. Over the past few months, the organization collaborated with Eclypsium to mitigate the impact of the vulnerability.

As MegaRAC BMC is incorporated into various hardware systems and software solutions, it’s difficult to resolve the vulnerability with a single patch.

According to Eclypsium, it’s currently unknown whether the vulnerability is being actively exploited by cybercriminals. The security company advised organizations to take several precautions.

Admin accounts and usernames

In addition to the problem in Redfish, Eclypsium discovered two vulnerabilities with lower CVSS scores. First, MegaRAC BMC uses a default admin account with a default password, allowing attackers to gain access to high privileges (CVE-2022-40242).

Second, a flaw in MegaRAC BMC’s password recovery process allows attackers to check whether a username is in use, which can help deduct the usernames of accounts (CVE-2022-2827).

Tip: OT data center security should be much higher on the agenda

Dell Technologies Inc. said today it’s expanding its portfolio of high-performance computing server lineup with a range of new systems that combine the latest silicon hardware from Nvidia Corp. and Intel Corp.

The new Dell PowerEdge servers were designed in collaboration with those chipmakers and will enable businesses of any size to perform workloads such as artificial intelligence model training, HPC modeling and simulations, core-to-edge inferencing and data visualization, the company said.

They’re led by the PowerEdge XE9680, which Dell said is its first-ever high-performance server fitted with eight graphics processing units. Customers can choose from Nvidia’s H100 Tensor Core GPUs or A100 Tensor Core GPUs, combined with two upcoming 4th generation Intel Xeon Scalable central processing units and Dell’s new Smart Cooling technology to deliver unrivaled performance for AI workloads, Dell says.

One step down is the PowerEdge XE9640, a 2U performance optimized server equipped with four of Intel’s new Data Center GPU Max Series processors and two Intel Xeon Scalable CPUs. According to Dell, the PowerEdge XE9640 employs fully direct liquid cooling to reduce energy costs by up to 3.1 times, while achieving greater rack density.

Finally, there’s the PowerEdge XE8640, which boasts air-cooled 4U performance with four of Nvidia’s H100 or A100 GPUs, two Intel Xeon Scalable processors and Nvidia NVLink technology. All three servers are set to become globally available in the first half of 2023.

Today’s launch is all about making HPC and AI more accessible, Dell said. To that end, its HPC PowerEdge servers are being made available today in the U.S. through Dell Apex, a pay-as-you-go infrastructure offering that combines on-premises, pay-per-use infrastructure servers and storage with cloud-based managed resources.

The company reckons this could well prove to be a game changer, enabling organizations of any size to run large-scale, compute-intensive HPC workloads on an as-a-service basis through a fully managed subscription-based experience. Under the Apex High Performance Computing offering, Dell says, customers can access everything they need to run HPC workloads, including an HPC cluster manager, container orchestrator, workload manager and the underlying hardware, optimized for specific workloads such as life sciences or manufacturing. Customers also benefit from flexible capacity options too, with one-, three- and five-year subscriptions available.

Rajesh Pohani, vice president of portfolio and product management for PowerEdge, HPC and Core Compute at Dell, predicted that there will be a lot of demand for the Apex High Performance Computing service.

“As compute innovation accelerates to keep pace with demand, customers are looking to upgrade their IT environments and harness advanced computing capabilities to speed discovery and insights,” said Rajesh Pohani, vice president of portfolio and product management for PowerEdge, HPC and Core Compute at Dell Technologies. “New Dell Technologies servers and solutions supply businesses of all sizes access to technologies once only accessible for the world’s largest research institutions and government agencies, allowing them to tackle HPC, ease AI adoption and propel their businesses forward.”

In addition, Dell is looking to support accelerated compute that takes advantage of quantum technology. The new Dell Quantum Computing Solution, also available today in the U.S. and Canada, is aimed at complex workloads such as chemistry and materials simulation, natural language processing and machine learning. It’s based on Dell’s classic quantum simulator built on PowerEdge servers, which integrates with cloud-based quantum computing services from IonQ Inc., making it possible for companies to run quantum workloads either on-premises or in the cloud.

Peter Rutten, an analyst as International Data Corp., said accelerated compute technology is essential to help businesses get more value from the massive amounts of data they generate each day. “Dell Technologies is seizing the opportunity with new accelerated Dell PowerEdge servers and solutions, serving customer’s needs for tackling demanding workloads.”

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It’s almost a week since Black Friday, but Dell is still selling the Dell XPS 13 with a $250 discount that lowers the massively popular laptop’s price to a more affordable $749 from its original price of $999. It’s one of the best offers from the Dell laptop deals during the shopping event, so don’t miss this chance to grab it. Once the Dell XPS 13 returns to its normal price, we’re not sure when’s the next opportunity to buy it for cheaper than usual, so hurry up and take advantage of this limited-quantity deal.

If you’re going to invest in a laptop, the Dell XPS 13 should be one of your top options because it’s been a mainstay in Digital Trends’ list of the best laptops. One of the primary reasons is because of its sleek design, including virtually no bezels surrounding its 13.4-inch Full HD+ screen with a 60Hz refresh rate. The laptop is just 0.55 inches thick and weighs only 2.59 pounds, so you won’t have any trouble bringing it with you as you move around the house, switch desks in the office, or commute to different places.

The Dell XPS 13 doesn’t just look good — it performs well, too, with its 12th-generation Intel Core i5 processor and integrated Intel Iris Xe Graphics. The laptop also features 8GB of RAM, which our laptop buying guide says is the sweet spot for most users. With these specifications, you’ll be able to multitask between several apps without worrying about crashes. The Dell XPS 13 also comes with Windows 11 Home pre-installed in its 512GB SSD, so it’s ready to roll as soon as you unbox it.

Don’t tell Dell, but it looks like the computer manufacturer forgot to turn off its laptop deals for Black Friday because the Dell XPS 13 is still available for $749. That’s $250 in savings from its original price of $999, but you need to act fast because the offer may disappear at any moment. The deal’s availability is limited, so we don’t expect it to still be around tomorrow — if you like this price for the Dell XPS 13, and you want to get the laptop before the chaos of the holiday season, now’s the time to buy it.

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Noise is currently quantum computing’s biggest challenge as well as its most significant limitation. IBM is working to reduce that noise in the next few years through various types of quantum error management until true quantum error correction (QEC) is attained.

Here is why reducing noise is so important. A quantum bit (qubit) is the basic unit of information for quantum computers, and the longer a qubit can maintain its quantum state, the more computational operations it can perform. Unfortunately, qubits are very sensitive to environmental noise, which can come from a quantum computer’s control electronics, wiring, cryogenics, other qubits, heat, and even external factors such as cosmic radiation. Noise is problematic because it can cause a qubit’s quantum state to collapse (a condition called decoherence) and thus create errors. An uncorrected error can cascade into an avalanche of errors and destroy an entire computation.

This type of noise originates at the atomic level, and even though it can't be completely eliminated, it can be managed.

Quantum advantage and noise

Despite media hype, there is no documented evidence that current quantum computers are more powerful than classical supercomputers. Even so, there is no question that quantum computers have an indisputable advantage. Most experts believe it's only a matter of time before quantum computing demonstrates its superiority compared to classical supercomputers. When that occurs, quantum computing will have achieved what is commonly referred to as “quantum advantage.”

IBM defines quantum advantage as a significant improvement in quantum algorithm runtime for practical cases over the best classical algorithm. Its blog further states that the algorithm needed to prove quantum advantage must have an efficient representation as quantum circuits, and there should be no classical algorithm capable of simulating those circuits efficiently.

But here’s the dilemma: For quantum computers to achieve quantum advantage, besides improving qubit coherence, gate fidelities, and speed of circuit execution, we must also significantly increase computational qubit counts. But upping the number of qubits also increases noise and qubit errors. Therefore, managing noise and qubit errors is critical to the long-term success of quantum computing.

Although error correction is common in classical computers and in certain types of memory hardware, we can’t use the same techniques in quantum computers because the laws of quantum mechanics make it impossible to clone unknown quantum states.

Quantum error correction (QEC) is a complex engineering and physics problem. And despite its importance and the number of years that have been invested thus far in the search for a solution, quantum error correction remains elusive and still appears to be many years away. Until full error correction becomes available, IBM is researching other error management solutions.

Quantum error management

The above IBM chart compares the exponential scaling of error-mitigated quantum circuits to the exponential scaling of classical computers. The crossover point is where quantum error mitigation becomes competitive with classical solutions.

IBM has a long history of error correction research, beginning with David DiVincenzo’s investigations in 1996. In 2015, it developed the first system to detect quantum bit flip and phase flip errors. Today, almost every corporate and academic quantum computing program has some form of error correction research in progress because of the importance of quantum error correction.

IBM currently looks at quantum error management through the lens of three methods: error suppression, error mitigation, and error correction. Setting aside error correction for the moment, let’s consider the other two approaches.

Error suppression is one of the earliest and most basic methods of handling errors. It typically modifies a circuit, uses pulses of energy to keep a qubit in its quantum state longer, or directs pulses at idle qubits to undo any unwanted effects caused by neighboring qubits. These types of error suppression are known as dynamic decoupling.

Error mitigation is the method that IBM believes will bridge the gap between today’s error-prone hardware and tomorrow’s fault-tolerant quantum computers. Error mitigation’s interim purpose is to enable early achievement of quantum advantage.

IBM has done more continuous error mitigation research than any other institution. Through that work, IBM has developed multiple approaches to error mitigation, including probabilistic error cancellation (PEC) and zero-noise extrapolation (ZNE).

• PEC functions much like noise-canceling headsets where noise is extracted and analyzed, then inverted before being mixed with the original noise signal to cancel it out. One significant difference for PEC is that, rather than using single samples as in audio noise-canceling algorithms, PEC uses averages calculated from a collection of circuits.
• ZNE reduces noise in a quantum circuit by running the quantum program at different noise levels, then extrapolating the computation to determine an estimated value at a zero-noise level.

Effective quantum error correction would eliminate almost all noise-related errors. It is worth noting that QEC exponentially suppresses errors with increasing code size. At any finite code size, errors will always be present. For optimum results, it will be important to pick a code size that suppresses errors just enough for the target application.

But until QEC becomes available, it appears that quantum error mitigation provides the fastest path to quantum advantage.

Dialable error reduction

IBM recently announced the integration of error suppression and error mitigation into Qiskit Runtime primitives Sampler and Estimator. As beta features, these allow a user to trade speed for fewer errors. IBM's roadmap projects the final release of these features in 2025.

There is overhead associated with compiling, executing, and classical post-processing of error mitigation techniques. The amount of overhead varies depending on the type of error mitigation used. IBM introduced a new simplified option for the primitives called a “resilience level” that allows users to dial in the cost/accuracy tradeoff needed for their work. Sampler and Estimator will automatically apply dynamical decoupling error suppression to circuits at optimization levels 1 through 3. Resilience 0 offers no error mitigation, Resilience 1 is measurement error mitigation, Resilience 2 provides biased error mitigation (via ZNE), and Resilience 3 enables unbiased estimators (via PEC).

Error mitigation will be available on all cloud-accessible IBM systems. As the resilience number increases, so does the cost. Resilience 3 produces the fewest errors but could require 100,000X more computation time.

Dr. Blake Johnson, IBM Quantum Platform Lead, explained the rationale for IBM’s implementation of this option for error mitigation services.

“We have some very advanced users that want to do everything themselves,” Dr. Johnson said. “They don't want us touching their circuits. That’s fine with us, so we make that possible. But we are seeing more and more users who look at a quantum computer like you would look at a toaster. They don’t understand how it works. They just want to push a button and make the right thing happen. So, we decided to enable certain things as defaults if it doesn’t have a sampling overhead and if there isn’t an additional cost to run it.”

Quantum error correction

Thanks to error correction research conducted by the entire quantum computing community, significant progress has been made on QEC over the past decade. Even so, it is likely that years of more research will be required to find a workable solution.

One of the early challenges of quantum error correction was determining if an error had been made without destroying a qubit's quantum state by measuring it. In 1995, Peter Shor developed a breakthrough solution to circumvent the problem. Rather than storing the quantum state in a single qubit, Shor’s system encoded quantum information in a logical qubit distributed across nine physical qubits. The scheme enabled errors to be detected by monitoring the system's parity rather than destroying the quantum state with direct measurements.

IBM is currently investigating many approaches to quantum error correction, including some similar to Shor’s code. This class of error correction code is called quantum Low-Density Parity Check (qLDPC). LDPC is not new. It is used in many classical error correction applications, such as Wi-Fi and 5G.

According to IBM, qLDPC offers the following advantages:

• Only a few physical qubits are needed for each logical qubit, rather than the hundreds that are needed for 2-D surface code.
• Only a limited number of qubits are exposed if a faulty operation occurs.

The research opportunities and diverse methods for quantum error correction are too numerous to cover here, but having many options is a good problem to have. If a fault-tolerant quantum computer is ever to be realized, we must find a solution for error correction, and the more options we have, the better our chances.

IBM’s quantum roadmap reflects the complexity of the problem. It shows an error correction solution becoming available sometime beyond 2026. Indeed, it will likely take several years beyond that.

Wrapping up

As quantum hardware continues to improve, there is a high probability that quantum error mitigation, as implemented by IBM's roadmap, will facilitate the early achievement of quantum advantage. Presently, error mitigation has an exponential runtime influenced by how many qubits are needed and the circuit depth. But improvements in speed, qubit fidelity, and error mitigation methods are expected to considerably reduce that overhead.

It is IBM's goal for error mitigation to provide a continuous development path to error-correction. Once QEC is attained, it will enable us to build fault-tolerant quantum machines running millions of qubits in a quantum-centric supercomputing environment. These machines will have the ability to simulate large many-body systems, optimize complex supply chain logistics, create new drugs and materials, model and react to sophisticated financial market behavior, and much more.

Fault-tolerant quantum computers will signal that a new era of quantum-centric scientific investigation has arrived. And with that new capability will come the potential to responsibly change the world.

Analyst notes

1. Despite media hype about the power of quantum computers, it has yet to be demonstrated that quantum has a clear computational superiority over classical supercomputers.
2. Quantinuum recently published two important QEC proofs-of-concept. Its researchers developed a logical entangling circuit with higher fidelity than its physical counterparts. Researchers also entangled two logical qubit gates in a fully fault-tolerant manner.
3. IBM announced that dynamic circuits will also be available its systems along with error mitigation. Dynamic circuits are expected to play an important role in quantum Low-Density Parity Check (qLDPC) error correction codes.
4. In preparation for quantum advantage, IBM began scaling up its processors with the recently announced 433 Osprey qubit processor. The Osprey has 3X more qubits than the current 127-qubit Eagle processor.
5. In addition to IBM’s error suppression and error mitigation initiatives, these are the major highlights in IBM's quantum roadmap that provide a path to quantum advantage:

• 2023 — Further scaling occurs with the release of the Condor processor, with 1121 qubits. Work also continues on initiatives to Boost system-wide speed and quality.
• 2024 — IBM will begin to integrate and test key technologies that enable future scaling such as classical parallelization, couplers, multi-chip quantum processors, and quantum parallelization.
• 2025 — Implementation of modular quantum hardware, new control electronics, and cryogenic infrastructure are the final near-term hardware pieces needed for attaining quantum advantage.
• 2026 — IBM will have the capability of scaling up future systems to 10K–100K qubits. By then, it should also have significantly increased the system speed and quality. A mature implementation of quantum error mitigation will make it possible to attain quantum advantage. Significant advances in quantum error correction will also have been made.

Follow Paul Smith-Goodson on Twitter for current information and insights about Quantum, AI, Electromagnetics, and Space

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Moor Insights & Strategy founder, CEO, and Chief Analyst Patrick Moorhead is an investor in dMY Technology Group Inc. VI, Dreamium Labs, Groq, Luminar Technologies, MemryX, and Movand

Note: Moor Insights & Strategy writers and editors may have contributed to this article.